|
Authors: | Pratyush Kumar, Lothar Thiele |
Group: | Computer Engineering |
Type: | Inproceedings |
Title: | System-Level Power and Timing Variability Characterization to Compute Thermal Guarantees |
Year: | 2011 |
Month: | October |
Pub-Key: | KT11d |
Book Titel: | In Proc. of the 9th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2011 |
Pages: | 179-188 |
Keywords: | MPA, ESD |
Publisher: | ACM |
Abstract: | With ever-increasing power densities, temperature manage- ment using software and hardware techniques has become a necessity in the design of modern electronic systems. Such techniques have to be validated and optimized with respect to the thermal guarantee they provide, i.e., a safe upper- bound on the peak temperature of the system under all op- erating conditions. The computation of such a guarantee depends on the power and timing characteristics of the sys- tem. In this paper, we present formalisms to capture such characteristics at the system-level and provide an analyti- cal technique to compute a provably safe upper-bound on the peak temperature. The proposed characterization and analysis is general in that it considers an impulse-response- based thermal model, task-dependent power consumption, tasks with dynamic arrival patterns and variable resource demand, and a scheduling policy expressed as a hierarchical composition of several commonly used policies. |
Location: | Taipei, Taiwan |
Resources: | [BibTeX] [Paper as PDF] |